TF1260 firmware upgrade using a Raspberry Pi

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DISCLAIMER

This is a description of how I upgraded the firmware in my TerribleFire TF1260 accelerator. It is my own personal experience, and in no way, shape, or form an official or endorsed description by Stephen, or any of the card builders. It worked for me, but it might not work for you, or just as well break, brick, or kill your Amiga, your Raspberry Pi, or your TF1260. It might even cause a terrible fire, and I won't be responsible. In other words: DO NOT DO THIS, IF YOU'RE NOT COMFORTABLE ACCEPTING THE RISK. YOU'RE ON YOUR OWN.

Intro

This description was tested using the December 2021 firmware release by Stephen Leary. His release is available here:

https://www.exxoshost.co.uk/forum/viewtopic.php?f=75&t=4947

Make sure to read and understand what's written there, before proceeding further with this description.

I used my older Raspberry Pi 3, running Raspberry OS Buster, which was "oldstable" at the time of writing this documentation. Your mileage WILL vary with other combinations. I refer to further documentation where possible.

Getting and building the tools

First, you need to get and build the Matrix.io fork of xc3sprog. This software can program the Xilinx CPLDs on the TF1260, and in particular, this fork can do it via the GPIO pins of the Raspberry Pi.

PLEASE NOTE THAT THE xc3sprog VERSION YOU CAN INSTALL VIA APT WON'T WORK FOR THIS PURPOSE.

First, install the build requirements:

$ sudo apt-get update
$ sudo apt-get install build-essential libusb-dev libftdi-dev libgpiod-dev wiringpi git cmake

Then, build it:

$ git clone https://github.com/matrix-io/xc3sprog
$ cd xc3sprog
$ mkdir build
$ cd build
$ cmake ..
$ make

This will print a bunch of warnings between the build messages, but just ignore those until the build is finished.

Wiring things up

Now, lets wire up the pins for JTAG. I used some pre-made Dupont cables I bought on Amazon [1], with male pins on one end, and female plugs on the other end. The TF1260 has a 6 pin JTAG header, but we won't connect 3V3, so we'll use 5 wires.

Make sure your TF1260 and Amiga is powered OFF at this point. Use the following list to wire up the TF1260 header to the Raspberry Pi. The numbers in the list are physical pin numbers. Also refer to the pictures below to see the correct wiring.

  • TMS to Header pin 7
  • TDI to Header pin 15
  • TDO to Header pin 13
  • TCK to Header pin 11
  • GND to Header pin 9
JTAG wiring, Raspberry Pi 3 side
JTAG wiring, TF1260 side

Note that while you do not need to connect 3V3, in fact I advise you not to, you absolutely and under all circumstances need to connect GND (Ground). If you got the wiring right, power the Amiga ON. The card is immediately ready to be talked through JTAG. Note that you may need to GENTLY press the side of Dupont cable pins on the TF1260 while communicating with the card, so they make better contact.

While pressing the pins, the execute the following command on the Raspberry Pi:

$ ./xc3sprog -c matrix_creator -j

The result you get should be something like this:

XC3SPROG (c) 2004-2011 xc3sprog project $Rev: 774 $ OS: Linux
Free software: If you contribute nothing, expect nothing!
Feedback on success/failure/enhancement requests:
        http://sourceforge.net/mail/?group_id=170565
Check Sourceforge for updates:
        http://sourceforge.net/projects/xc3sprog/develop

JTAG loc.:   0  IDCODE: 0x59616093  Desc:                      XC95288XL Rev: E  IR length:  8
JTAG loc.:   1  IDCODE: 0x59616093  Desc:                      XC95288XL Rev: E  IR length:  8

The last two lines must show the two CPLDs on the card. Do NOT proceed further, if you don't get this output.

Flashing the CPLDs

Now, download the archive released by Stephen onto your Raspberry Pi, and extract it. You will need two files from it:

tf1260r1_ram_top.jed
tf1260r1_bus_top.jed

NOTE: If you have a card with 6ns CPLD, you might want to use the file tf1260r1_ram_top_6ns.jed instead of tf1260r1_ram_top.jed. If you are unsure, ask your builder, or imply use the regular file.

IMPORTANT: The CPLD at JTAG location 0 (zero), is the RAM CPLD. The CPLD at JTAG location 1 (one) is the BUS CPLD. Do not mix the CPLD files up!

You can flash the CPLDs with the following commands. Remember to GENTLY press on the connector pins on the card! Also remember your Amiga must be POWERED ON for this to work.

Do the RAM CPLD first:

$ ./xc3sprog -c matric_creator -p 0 -v <path_to_the_tf1260_files>/tf1260r1_ram_top_jed

and the BUS CPLD second:

$ ./xc3sprog -c matric_creator -p 1 -v <path_to_the_tf1260_files>/tf1260r1_bus_top_jed

Note that I had to execute each of these commands several times to get the CPLD flashed properly. I can't tell why. Repeat until you get the message Success! Verify time <a number> ms. If you get the message Mismatch at fuse <a number>: then you need to repeat the operation. If you're an expert in xc3sprog and you know why this happens or how to correct it, post it somewhere (not Facebook) so I can read it and fix this description. :) It could be that it's a weakness in wiring, or the way xc3sprog bitbangs the GPIO, or other software issue. Soldering a header into the card might work better, I don't know.

Also remember the Amiga will stop working during the flashing operation. This is nothing to be alarmed of, and completely normal.

After both flashing have succeeded, power your Amiga OFF. Wait a few seconds, then power it ON again. The machine should boot normally, but with the new firmware.

Have fun with your upgraded TF1260! If you have troubles, well, you're out of luck here. Try to use the official method using a proper JTAG adapter.

Other resources

  • Upgrading a Xilinx 9500 series CPLD using xc3sprog. [2] This also covers using the xc3sprog Wiring Pi method, which might work on Raspberry Pi 4.