Amiga Machine Language (Appendix B)

The following text is part of the Amiga Machine Language tutorial.

Appendix B, Overview of the MC68000 Instructions

Abbreviations (symbols) used:

         label     A label or address
         reg       Register
         an        Address register n
         dn        Data register n
         source    source operand
         dest      destination operand
         <ea>      address of register
         #n        direct value

General Instructions

         BCC   label         Conditional branch, depends on condition.
         BRA   label         Unconditional branch (Similar to JMP).
         BSR   label         Branch to subprogram. Return address is
                             deposited on the stack, RTS causes return to
                             that address.
         CHK   <ea>,dx       Check data register for limits, activate the
                             CHK instruction exception.
         DBCC  reg,label     Check condition, decrement on branch.
         JMP   label         Jump to address (Similar to BRA).
         JSR   label         Jump to a subroutine. Return address is deposited
                             on stack, RTS causes return to that address.
         NOP                 No operation.
         RESET               Reset peripherals (Caution!).
         RTE                 Return from exception.
         RTR                 Return with loading of flags.
         RTS                 Return from subroutine (After BSR or JSR).
         SCC   <ea>          Set a byte to -1 when condition is met.
         STOP                Stop processing (Caution!).
         TRAP  #n            Jump to an exception.
         TRAPV               Check overflow flag, then TRAPV exception.

Arithmetic operations with whole numbers

         ADD   source,dest   Binary addition.
         ADDA  source,an     Binary addition to an address register.
         ADDI  #n,<ea>       Addition with a constant.
         ADDQ  #n,<ea>       Fast addition of a constant which can be only
                             from 1 to 8.
         ADDX  source,dest   Addition with transfer in X flag.
         CLR   <ea>          Clear an operand.
         CMP   source,dest   Comparison of two operands.
         CMPA  <ea>,an       Comparison with an address register.
         CMPI  #n,<ea>       Comparison with a constant.
         CMPM  source,dest   Comparison of two memory operands.
         DIVS  source,dest   Sign-true division of a 32 bit destination by
                             a 16 bit source operand. The result of the
                             division is stored in the LO word of the
                             destination, the remainder in the HI word.
         DIVU  source,dest   Division without regard to sign, similar to DIVS.
         EXT   dn            Sign-true expansion to twice original size
                             (width) data unit.
         MULS  source,dest   Sign-true multiplication of two words into one
                             word.
         MULU  source,dest   Multiplication without regard to sign, similar
                             to MULS.
         NEG   <ea>          Negation of an operand (twos complement).
         SUB   source,dest   Binary subtraction.
         SUBA  <ea>,an       Binary subtraction from an address register.
         SUBI  #n,<ea>       Subtraction of a constant.
         SUBQ  #n,<ea>       Fast subtraction of a three bit constant.
         SUBX  source,dest   Subtraction with transfer in X flag.
         TST   <ea>          Test operand and set N and Z flag.

Binary coded (BCD) decimal numbers

         ABCD  source,dest   Addition of two binary coded decimal numbers.
         NBCD  source,dest   Negation of a binary coded decimal number
                             (nine complement).
         SBCD  source,dest   Subtraction of two binary coded decimal numbers.

Logical operations

         AND   source,dest   Logic AND.
         ANDI  #n,<ea>       Logic AND with a constant.
         EOR   source,dest   Exclusive OR.
         EORI  #n,<ea>       Exclusive OR with a constant.
         NOT   <ea>          Inversion of an operand.
         OR    source,dest   Logic OR.
         ORI   #n,<ea>       Logic OR with a constant.
         TAS   <ea>          Check a byte and set bit 7.

Single bit manipulation

         BCHG  #n,<ea>       Change bit n(0 is changed to 1 and vice versa).
         BCLR  #n,<ea>       Clear bit n.
         BSET  #n,<ea>       Set bit n.
         BTST  #n,<ea>       Test bit n, result is desplayed in Z flag.

Shift and rotate operands

• NOTE: n indicates a register, # indicates a direct value which specifies the number of shiftings.

         AS    n,<ea>        Arithmetic shift to the left (*2^n)
         ASR   n,<ea>        Arithmetic shift to the right (/2^n)
         LSL   n,<ea>        Logic shift to the left.
         LSR   n,<ea>        Logic shift to the right.
         ROL   n,<ea>        Rotation left.
         ROR   n,<ea>        Rotation right.
         ROXL  n,<ea>        Rotation left with transfer in X flag.
         ROXR  n,<ea>        Rotation right with transfer in X flag.

Move data instructions

         EXG   rn,rn         Exchange two register contents (don't confuse
                             with swap!).
         LEA   <ea>,an       Load an effective address in address register an.
         LINK  an,#n         Build stack range.
         MOVE  source,dest   Carry value over from source to destination.
         MOVE  SR,<ea>       Transfer the status register contents.
         MOVE  <ea>,SR       Transfer the status register contents.
         MOVE  USP,<ea>      Transfer the user stack pointer.
         MOVE  <ea>,USP      Transfer the user stack pointer.
         MOVEA <ea>,an       Transfer a value to the address register an.
         MOVEM regs,<ea>     Transfer several registers at once.
         MOVEM <ea>,regs     Transfer several registers at once.
         MOVEP source,dest   Transfer data to peripherals.
         MOVEQ #n,dn         Quickly transfer an eight bit constant to the
                             data register dn.
         PEA   <ea>          Deposit an address on the stack.
         SWAP  dn            Swap the halves of the register (the upper 16 bit
                             with the lower).
         UNLK  an            Unlink the stack.